In general, approaches of nano technology can be divided into a top-down method and a bottom-up method. The top-down method is a technique of gradually decreasing sizes of materials or semiconductor devices. For example, the top-down method develops the existing device into MEMS (Micro electro-mechanical system) and NEMS (Nano electro-mechanical system). The button-up method, which has recently become distinguished in the nano technology, makes a larger device using electrons, molecules or nano blocks. For example, the bottom-up method includes a technique that synthesizes a larger structure or develops a new medicine in the bio-technology field using nano tubes.
Recently, the semiconductor field has employed the bottom-up method as an approach of nano technology. For example, CMOS (Complementary Metal Oxide Semiconductor) based logic circuits are used as semiconductor devices used in notebook computers or mobiles.
CMOS devices are constructed in such a manner that a P-channel transistor and an N-channel transistor form an inverter circuit to reduce power consumption in silicon semiconductor device technology and widely used for semiconductor devices with a low operating speed and very low power consumption, pocket calculators, wrist watches and the like.